ACM International Conference on Computing Frontiers 2015 (CF'15)
May 18 - 21, 2015, Ischia, Italy
CALL FOR PARTICIPATION
www.computingfrontiers.org
==================================================================
EARLY REGISTRATION DEADLINE: April 15th, 2015
Computing Frontiers represents an engaged, collaborative community
of researchers who are excited about transformational technologies
in the field of computing. We are presently on the cusp of several
revolutions, including new memory technologies, networking
technologies, algorithms for handling large-scale data, power-saving
and energy-efficient solutions for data centers, systems solutions
for cloud computing, new application domains that affect every day
life and many, many more. Boundaries between the state-of-the-art
and revolutionary innovation constitute the computing frontiers that
must be pushed forward to advance science, engineering, and
information technology. Before revolutionary materials, devices,
and systems enter the mainstream, early research must be performed
using far-reaching projections of the future state of technologies.
CF'15 provides an excellent mix of technical presentations. In
addition to research and industrial paper presentations, there will
be two keynote speeches
* Gianfranco Bilardi, University of Padova:
Network Oblivious Algorithms
* Pietro Leo, IBM Italy CTO Big Data Analytics & Watson:
From managing Data to managing Cogs: Digital Transformation & Data
is changing our ways to work and interact with machines
This year's conference also includes three affiliated workshops focusing
on cutting-edge topics:
* Future Information Security, Privacy and Forensics for Complex Systems
* LP-EMS15 - Design of Low Power Embedded Multimedia Systems
* Analytics Platforms for the Cloud
WE CORDIALLY INVITE YOU TO PARTICIPATE IN THIS EVENT.
PRELIMINARY PROGRAM:
===================
Monday, May 18
==============
Workshops
Tuesday, May 19
===============
Conference Opening
Keynote: Network Oblivious Algorithms
Gianfranco Bilardi
Session: Modeling and Characterization - I
An Empirical High level performance model for future many-cores
Surya Narayanan Natarajan, Bharath Narasimha Swamy and André Seznec
Just-in-time Component-wise Power and Thermal Modeling
Shah Mohammad Faizur Rahman, Qing Yi and Houman Homayoun
An Instrumentation Approach for Hardware-Agnostic Software Characterization
Andreea Anghel, Laura Mihaela Vasilescu, Rik Jongerius, Gero Dittmann
and Giovanni Mariani
Session: Computer Architectures
Near Threshold Cloud Processors for Dark Silicon Mitigation: The
Impact on Emerging
Scale-out Workloads
Jing Wang, Junwei Zhang, Weigong Zhang, Keni Qiu, Tao Li and Minhua Wu
An energy-efficient custom architecture for the SKA1-Low central
signal processor
Leandro Fiorin, Erik Vermij, Jan Van Lunteren, Rik Jongerius and Christoph
Hagleitner
Data Access Optimization in a Processing-in-Memory System
Zehra Sura, Arpith Jacob, Tong Chen, Bryan Rosenburg, Olivier Sallenave,
Carlo Bertolli, Samuel Antao, Jose Brunheroto, Yoonho Park, Kevin O'Brien
and Ravi Nair
Session: Compilers/Languages and Frameworks
Compiler Analysis for OpenMP Tasks Correctness
Sara Royuela, Roger Ferrer, Caballero and Xavier Martorell
Genesis: A Language for Generating Synthetic Training Programs for
Machine Learning
Alton Chiu, Joseph Garvey and Tarek Abdelrahman
A Significance-Driven Programming Framework for Energy-Constrained
Approximate Computing
Vassilis Vassiliadis, Charalampos Chalios, Konstantinos Parasyris,
Christos D. Antonopoulos, Spyros Lalis, Nikolaos Bellas, Hans Vandierendonck and
Dimitrios S. Nikolopoulos
Poster Flash Talks
ProductiveC: Enabling High Productivity in C-Family Languages
Hongbo Rong
Heterogeneous Energy-Efficient Cache Design in Warehouse Scale Computers
Jing Wang, Xiaoyan Zhu, Jiaqi Zhang, Minhua Wu, Weigong Zhang and Keni Qiu
B2L: A Case for Buffered and Bufferless Hybrid NoCs
Juan Fang, Sitong Liu, Zhenyu Leng, Shuying Song and Jianhua Wei
Removing Duplicated Writes in DB Checkpointing with File System-Level
Block Remapping
Daejun Park and Dongkun Shin
Two-Level Logging with Non-Volatile Byte-Addressable Memory in
Log-Structured File Systems
Yeonseong Hwang, Hyunho Gwak, Dongkun Shin and Sungkyunkwan University
Handling Consistent Web Service Recovery in a RESTful Way
Anna Kobusinska
Optimizing the Accuracy of a Satellite Trajectory Simulation by
Program Transformation
Nasrine Damouche, Matthieu Martel and Alexandre Chapoutot
Enhancing an x86_64 Multi-Core Architecture with Data-Flow Execution Support
Alberto Scionti, Ho Nam, Andrea Mondelli, Marco Solinas, Antoni
Portero and Roberto Giorgi
A Practical Evaluation of Synchronicity in Action Potentials with Noise
Jonathan Edwards and Simon O'Keefe
A Practical Framework for Real-time Diffusion Analysis in Social Media
Miki Enoki, Issei Yoshida and Masato Oguchi
Approximating Dictionary-Based Optimal Data Compression on a Distributed System
Sergio De Agostino:University of Rome La Sapienza
Understanding the Limiting Factors of Page Migration in Hybrid Main Memory
Santiago Bock, Bruce Childers, Rami Melhem and Daniel Mosse
Free Atomic Consistency in Storage Class Memory with Software Based
Write-Aside Persistence
Ellis Giles, Kshitij Doshi and Peter Varman
Programmer-directed Partial Redundancy for Resilient HPC
Omer Subasi, Javier Arias, Osman Unsal, Jesus Labarta and Adrian Cristal
The improved parallel Ray Casting Algorithm in embedded multi-core DSP Systems
Congliang Hu, Fugen Zhou and Li Tian
Welcome Reception
Wednesday May 20
================
Keynote: From managing Data to managing Cogs: Digital Transformation &
Data is changing
our ways to work and interact with machines
Pietro Leo
Session: Algorithms and Applications
Enhanced GPU-based Distributed Breadth First Search
Giancarlo Carbone, Enrico Mastrostefano, Massimo Bernaschi,
Massimiliano Fatica and
Mauro Bisson
An Evaluation and Analysis of Graph Processing Frameworks on Five Key Issues
Yun Gao, Wei Zhou, Jizhong Han, Dan Meng, Zhiyong Xu and Zhang Zhang
Optimizing Irregular Applications for Energy and Performance on the
Tilera Many-core Architecture
Daniel Chavarrýýa, Ajay Panyala, Mahantesh Halappanavar, Joseph
Manzano and Antonino Tumeo
Session: Fault Tolerance and Quantum Computing
Hierarchical Synthesis of Quantum and Reversible Architectures
Archimedes Pavlidis and Dimitris Gizopoulos
Cooperative Repair Based on Tree Structure for Multiple Failures in
Distributed Storage Systems
with Regenerating Codes
Xiaoqiang Pei, Yijie Wang, Xingkong Ma, Yongquan Fu and Fangliang Xu
Asteroid: Scalable Online Memory Diagnostics
Musfiq Rahman and Bruce R. Childers
Session: Resource Management
TaPEr: Tackling Power Emergencies in the Dark Silicon Era by
Exploiting Resource Scalability
Hui Zhao, Mahmut Kandemir and Mary Jane Irwin
HRF: A Resources Allocation Scheme for Moldable Jobs
Song Wu, Qiong Tuo, Hai Jin, Chuxiong Yan and Qizheng Weng
Scheduling Stream Programs with Improving Arithmetic Unit Usage on
NoC-based VLIW Multi-core
Architectures
Guoyue Jiang, Zhaolin Li, Fang Wang and Shaojun Wei
Chrysso: An Integrated Power Manager for Constrained Many-Core Processors
Sudhanshu Shekhar Jha, Wim Heirman, Ayose Falcon, Trevor E.Carlson,
Kenzo Van Craeynest,
Jordi Tubella, Antonio Gonzalez and Lieven Eeckhout
Session: Modeling and Characterization - II
Achieving High Throughput and Low Delay in Mobile Data Networks by Accurately
Predicting Queue Lengths
Ke Liu and Jack Y.B. Lee
Position-Aware Thread-Level Speculative Parallelization for
Large-Scale Chip-multiprocessor
Li Yanhua, Youhui Zhang and Weimin Zheng
SARP: Producing Approximate Results with Small Correctness Losses for
Cloud Interactive Services
Rui Han, Junwei Wang, Fengming Ge, Jose Luis Vazquez-Poletti and Jianfeng Zhan
Conference Banquet
Thursday May 21
===============
Session: Memory Technologies and Storage
Software-Managed Energy-Efficient Hybrid DRAM/NVM Main Memory
Ahmad Hassan, Hans Vandierendonck and Dimitrios S.Nikolopoulos
DP^2: Reducing Transaction Overhead with Differential and Dual Persistency
in Persistent Memory
Long Sun, Jiwu Shu and Youyou Lu
Dysource: A High Performance and Scalable NAND Flash Controller Architecture
Based on Source Synchronous Interface
Lizhou Wu, Nong Xiao, Fang Liu, Yimo Du, Shuo Li and Yang Ou
ETD-Cache: An Expiration-Time Driven Cache Scheme to Make SSD-based Read
Cache Endurable and Cost-efficient
Ningwei Dai, Yunpeng Chai, Yushi Liang and Chunling Wang
Session: Networking
HOSA: Hybrid Optical Switch Architecture for Data Center Networks
Muhammad Imran, Martin Collier, Pascal Landais and Kostas Katrinis
Fast packet forwarding engine based on software circuits
Marc X. Makkes, Ana Varbanescu, Cees de Laat, and Robert Meijer
AMTCP: An Adaptive Multi-path Transmission Control Protocol
Long Li, Nongda Hu, Ke Liu, Binzhang Fu, Mingyu Chen and Lixin Zhang
BandArb: Mitigating the Effects of Thermal and Process Variations in Silicon-
Photonic Network
Yi Xu, Jun Yang and Rami Melhem
Session: Tools and Social
Scaling Application Properties to Exascale
Giovanni Mariani, Andreea Anghel, Rik Jongerius, and Gero Dittmann
Moving to Memoryland: In-Memory Computation for Existing Applications
Pedro Trancoso
Socialness in the Recruiting of Software Engineers
Jens Ehlers
ORGANIZATION
============
Computing Frontiers 2015 Chairs
General Chairs: Claudia Di Napoli, ICAR-CNR, IT
Valentina Salapura, IBM Research, US
Program Chairs: Hubertus Franke, IBM Research, US
Rui Hou, Institute for Computing Technology,
Chinese Academy of Sciences, PRC
Finance Chair: Jens Breitbart, TU Munich, DE
Workshops Chair: Francesca Palumbo, University of Sassari, IT
Local Arrangements Chair:
Silvia Rossi, Universite degli Studi di Napoli
"Federico II", IT
Poster Chair: Alexander Heinecke, Intel Parallel Computing Lab, US
Publicity Chairs:
Kun Wang, Microsoft, PRC
Raymond Namyst, University of Bordeaux, FR
Publication Chair:
Michela Taufer, University of Delaware, US
Sally A. McKee, Chalmers University of Technology, SE
Web Chair: Kristian Rietveld, Leiden University, NL
**********************************************************
*
* Contributions to be spread via DMANET are submitted to
*
* DMANET@zpr.uni-koeln.de
*
* Replies to a message carried on DMANET should NOT be
* addressed to DMANET but to the original sender. The
* original sender, however, is invited to prepare an
* update of the replies received and to communicate it
* via DMANET.
*
* DISCRETE MATHEMATICS AND ALGORITHMS NETWORK (DMANET)
* http://www.zaik.uni-koeln.de/AFS/publications/dmanet/
*
**********************************************************
Posts
